The 'HC595 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state.Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register.Features8-Bit Serial-In, Parallel-Out ShiftWide Operating Voltage Range of 2 V to 6 VHigh-Current 3-State Outputs Can Drive Up To 15 LSTTL LoadsLow Power Consumption: 80-μA (Max) ICCtpd = 13 ns (Typ)±6-mA Output Drive at 5 VLow Input Current: 1 μA (Max)Shift Register Has Direct Clear